The present invention relates to nonvolatile semiconductor memory devices provided with a floating gate capable of electric write and erase operations, and a method of manufacturing the same.
Conventionally, floating gate type nonvolatile semiconductor memory devices such as that disclosed in JP S61-127179A, which has a so-called stacked-gate structure made of a floating gate electrode and a control gate electrode stacked thereon, are well known as semiconductor memory devices capable of electric write and erase operations.
As shown in FIG. 14, a conventional nonvolatile semiconductor memory device with a stacked-gate structure is made of a semiconductor substrate 101 having a source region 102 and a drain region 103 formed in its upper portion by ion implantation, and a stacked-gate structure 110 formed on the semiconductor substrate 101 at the region between the source region 102 and the drain region 103, that is, on the channel region. The stacked-gate structure 110 includes a tunnel insulating film 104, a floating gate electrode 105, a capacitor insulating film 106, and a control gate electrode 107 formed sequentially from the substrate side.
In such a conventional stacked-gate nonvolatile semiconductor memory device, data are read by providing a potential difference of about 1.5 V between the source region 102 and the drain region 103 and applying a voltage of about 5 V to the control gate electrode 107, and then detecting the value of the current flowing between the source region 102 and the drain region 103.
Data are erased by applying 0 V to the control gate electrode 107 and a voltage of about 10 to 15 V to the drain region 103, and then, due to Fowler Nordheim Tunneling, the electrons that have accumulated in the floating gate electrode 105 are pulled to the drain region 103 through the tunnel insulating film 104 via the area of overlap between the floating gate electrode 105 and the drain region 103.
Conventional stacked-gate nonvolatile semiconductor memory devices, however, are prone to the problem of over-erasing, where electrons are excessively pulled from the floating gate electrode 105 during erasing and as a consequence the channel region goes into depletion mode. As a result, current also flows through non-selected memory cells during readout, and this results in read mistakes.
To remedy these read mistakes, floating gate nonvolatile semiconductor memory devices with a so-called split-gate structure in which a portion of the control gate electrode is in opposition to the channel region have recently been proposed in, for example, S. Kianian, et al., VLSI Technologies Dig. pp. 71-72, 1994, among others.
As shown in FIG. 15, a conventional nonvolatile semiconductor memory device with a split-gate structure is made of a semiconductor substrate 101 having a source region 102 and a drain region 103 formed in its upper portion by ion implantation, and a split-gate structure 111 formed on the channel region of the semiconductor substrate 101 between the source region 102 and the drain region 103.
The split-gate structure 111 includes a floating gate electrode 105, which is formed such that one of its sides overlaps with the source region 102 with a tunnel insulating film 104 between them, a capacitor insulating film 106 that covers the floating gate electrode 105 and the semiconductor substrate 101, and a control gate electrode 107 that covers an end portion of the drain region 103 and the top surface and the side surface on the drain region 103 side of the floating gate electrode 105 and is capacitively coupled with the floating gate electrode 105.
Because the semiconductor memory device has the split-gate structure 111, even if the floating gate electrode 105 is over-erased, current does not flow through non-selected memory cells during readout and thus read mistakes do not occur, because the channel region is also formed below the control gate electrode 107.
However, in conventional stacked-gate and split-gate nonvolatile semiconductor memory devices, the capacitor insulating film 106 that is capacitively coupled with the control gate electrode 107 is often formed by thermal oxidation after the floating gate electrode 105 is formed, at which time film thickening referred to as a xe2x80x9cbirds beakxe2x80x9d occurs in the side portion of the tunnel insulating film 104 in the gate length direction. As a consequence of the birds beak, the read current value during reading is reduced and the electric field applied to the tunnel insulating film 104 during erasing is weakened, thus leading to a noticeable drop in the erase speed.
Moreover, the capacitor insulating film 106, which is made by oxidizing the polysilicon formed on the floating gate electrode 105, is formed roughly twice as thick as a silicon oxide film at an identical oxidation time and has a lower withstand voltage. The resulting drop in the value of the capacitive coupling ratio between the control gate electrode 107 and the floating gate electrode 105 leads to a deterioration in reliability.
It should be noted that the capacitive coupling ratio is the ratio of the static capacitance between the floating gate electrode 105 and the control gate electrode 107 to the total static capacitance. The total static capacitance is the sum of the static capacitance between the floating gate electrode 105 and the control gate electrode 107 and the static capacitance between the floating gate electrode 105 and the semiconductor substrate 101 (the channel region, the source region 102 and the drain region 103).
The present invention solves the aforementioned conventional problems, and it is an object thereof to prevent the generation of a birds beak in the tunnel insulating film and to improve the film quality of and obtain a predetermined film thickness for the capacitor insulating film in the nonvolatile semiconductor memory device.
To achieve the above object, the present invention employs In Situ Steam Generation to form the capacitor insulating film.
More specifically, a nonvolatile semiconductor memory device according to the present invention is provided with a floating gate electrode that is formed on a semiconductor substrate with a first insulating film interposed between them and that is in an electrically floating state, and a control gate electrode that is formed on the floating gate electrode with a second insulating film interposed between them and that supplies a predetermined electric potential to the semiconductor substrate and the floating gate electrode, wherein the first insulating film has a substantially uniform thickness at the portion where it is in opposition to the floating gate electrode.
According to the nonvolatile semiconductor memory device of the present invention, the first insulating film, which functions as the tunnel film, has a substantially uniform film thickness at the portion where it is in opposition to the floating gate electrode, and there are no birds beak-shaped film thickening at the end portions of the first insulating film in the gate length direction. Thus, there are no reductions in the value of the read current or drops in the erase speed.
In the nonvolatile semiconductor memory device of the present invention, it is preferable that the control gate electrode is formed from a top surface of the floating gate electrode, along a side surface thereof, to the semiconductor substrate next to that side surface, and that the control gate electrode is formed with the second insulating film interposed between it and the side surface and with a third insulating film interposed between it and the top of the semiconductor substrate. Consequently, a split-gate structure can be adopted for the gate.
In the nonvolatile semiconductor memory device of the present invention, it is preferable that the first insulating film and the third insulating film are formed through identical processes.
In the nonvolatile semiconductor memory device of the present invention, it is preferable that the second insulating film and the third insulating film are formed through identical processes.
A method of manufacturing a nonvolatile semiconductor memory device according to the present invention includes a first step of forming a floating gate electrode from a first conducting film by patterning the first conducting film after a first insulating film and the first conducting film are formed on a semiconductor substrate, a second step of forming a second insulating film on an upper portion and a side portion of the floating gate electrode by introducing hydrogen and oxygen above the heated semiconductor substrate and generating water vapor on the semiconductor substrate from the introduced hydrogen and oxygen, and a third step of forming a control gate electrode made of a second conducting film on the floating gate electrode with the second insulating film interposed between them.
According to the method of manufacturing a nonvolatile semiconductor memory device of the present invention, by using a so-called In Situ Steam Generation technique, in which water vapor is generated on the semiconductor substrate from the hydrogen and oxygen that are introduced onto the heated substrate after the first insulating film is formed on the semiconductor substrate, the second insulating film is formed on the upper portion and the side portions of the floating gate electrode. In Situ Steam Generation does not cause a birds beak in the already formed first insulating film (the tunnel film), and thus the film thickness of the first insulating film is substantially uniform. As a result, there are no reductions in the value of the read current or drops in the erase speed. Moreover, the second insulating film, which acts as the capacitor insulating film, is formed through In Situ Steam Generation, and thus, even if the second insulating film is a silicon oxide film of oxidized polysilicon, it can be obtained at a predetermined film thickness and at a precise film quality, so that there are no drops in the capacitive coupling ratio.
In the method of manufacturing a nonvolatile semiconductor memory device of the present invention, it is preferable that the first step includes a step of removing the first insulating film with the floating gate electrode serving as a mask, and that in the second step, the second insulating film is also formed on an upper portion of the semiconductor substrate.
In the method of manufacturing a nonvolatile semiconductor memory device of the present invention, it is preferable that the third step includes a step of depositing the second conducting film over the entire surface of the semiconductor substrate, including the floating gate electrode, and a step of patterning the deposited second conducting film such that the control gate electrode is positioned above only the floating gate electrode. Thus, a stacked-gate type gate structure can be achieved.
In the method of manufacturing a nonvolatile semiconductor memory device of the present invention, it is preferable that the third step includes a step of depositing the second conducting film over the entire surface of the semiconductor substrate, including the floating gate electrode, and a step of patterning the deposited second conducting film such that the control gate electrode covers a top surface and a side surface of the floating gate electrode. Thus, a split-gate type gate structure can be achieved.